VLSI Physical Design Course
What will I learn?
Bula ditalente tsa gago mo tirong ya go dira diphetogo ka Khoso ya rona ya VLSI Physical Design. Ithute ka botlalo dintlha tsa botlhokwa tsa mokgwa wa go dira diphetogo mo VLSI, o itse ka botlalo dintlha tsa chip, metlha ya tiragatso, le tiriso ya motlakase. Tokafatsa bokgoni jwa gago ka maano a a kwa godimo a go baya le go tsamaisa, mekgwa ya go rulaganya lefelo, le mekgwa ya netefatso. Nna o etelele pele ka kitsiso e e tseneletseng ya go kgonagala ga go dirwa le go oketsa tekanyetso ya thekenoloji. Khoso e e fana ka diteng tse di khutshwane, tsa maemo a a kwa godimo tse di diretsweng batho ba ba dirang diphetogo ba ba ikaeletseng go gaisa mo lephateng le le tswelelang pele la VLSI.
Apoia's Unique Advantages
Develop skills
Enhance the development of the practical skills listed below
Ithute ka botlalo mokgwa wa go dira diphetogo mo VLSI: Tsamaisa tsela yotlhe ya go dira diphetogo mo VLSI ka bokgabane.
Tokafatsa dintlha tsa chip: Tlhalosa le go tokafatsa tiragatso ya chip le dikgoreletsi.
Oketsa boikanyego jwa signale: Diragatsa mekgwa ya go tsamaisa go netefatsa boikanyego jwa signale.
Dira ditlhatlhobo tsa molao wa go dira diphetogo: Dira DRC le LVS go netefatsa diphetogo tse di nonofileng.
Sekaseka dintlha tse di tlhagelelang: Nna o itsisiwe ka kgatelopele ya bosheng mo go direng diphetogo mo VLSI.
Suggested summary
Workload: between 4 and 360 hours
Before starting, you can modify the chapters and the workload.
- Choose which chapter to start with
- Add or remove chapters
- Increase or decrease the course workload
Examples of chapters you can add
You’ll be able to generate more chapters like the examples below
This is a free course, focused on personal and professional development. It is not equivalent to a technical, undergraduate, or postgraduate course, but offers practical and relevant knowledge for your professional journey.